ARM Cortex M0 and GPIO Port Address Masking

HOME
Uncategorized
ARM Cortex M0 and GPIO Port Address Masking

ARM Cortex M0 and GPIO Port Address Masking

ARM has apparently decided they want to go after markets traditionally reserved for 8-bit and 16-bit applications. They have released the new Cortex M0 core, a lower capability 32-bit core, with mostly 16-bit instructions, targeting cost sensitive applications. The only company, that I know of, selling chips based on this core is NXP with their LPC1100 series. This isn’t a huge surprise; two other typical ARM adopters that spring to mind, ST and TI, both have there own 8/16 bit lines and they wouldn’t want to compete with themselves.

After review the LPC1100, I have to say, they have quite a convincing case for using their product in lieu of 8-bit micros in many applications. To start, it is shockingly cheap, you can get these parts at mouser starting around 1$ for QTY 1. So, in the cost arena, it truly does compete well with 8-bit parts. It can be had significantly cheaper, for example, than a similarly spec’ed ATMEGA. The LPC1111 with 8KB program memory and 2KB RAM costs $1.30 at QTY 1; the new ATMEGA88PA, with 8KB and 1KB costs $3.05. I am not going to say the ATMEGA has no advantages vs. the LPC1111, because I am sure that it does (I have not looked in detail) but the Cortex M0 part has some very big computational advantages here. The chip runs at 50Mhz and runs most instructions in 1 cycle, including single cycle multiply. Compare that to the ATMEGA series which tops out at 20 MIPS or the PIC18 series which tops out at 16 MIPS. That’s a huge difference in power. The only thing I know if that comes close anywhere near 3$ is the Atmel XMega series which does 32 MIPS. The XMega also has a set of peripherals that blows away the LPC, it is too bad most xMega models are never in-stock anywhere.

If that weren’t enough, the LPC1100 series lists ridiculous power consumption figures. The chip consumes 3mA at 12Mhz and 9mA running at full bore at 50mhz, in active mode. At 3V and 4Mhz, the ATMega88PA is already consuming almost 3ma and doing only 1/3 the work. To the best of my knowledge, Atmel’s most efficient 8-bit micro is the xMega, which consumes about 12ma at 32mhz. If we make an apples to oranges comparison with one of Microchip’s new darlings of power efficiency, the PIC16LF1823, things look a little better. The Pic uses 0.84ma at 16Mhz. Remember though, the PIC instruction cycle is 4 clocks long, so 16Mhz here can be though of as 4Mhz when comparing to an Atmel or LPC. To compare it to the LPC figure, we can roughly estimate by multiplying by 3 and getting about 2.52mA for 12 Mips. Slightly better, but this is comparing a much less capable micro in a different class with no hardware multiply. So basically, the power figures are impressive. It is worth noting that the PIC16LF1823, can be run on 1.8V, in which cases it only uses 0.47ma at 16Mhz.

One particular implementation defined feature (defined by NXP and not ARM) that caught my eye was the way in which bits can be assigned to the GPIO ports in one cycle using address masking. This feature is also implemented by the NXP Cortex M3 series. Rather than having one register address for a GPIO port, or even 3 (INV, SET, CLR) like many micros, the LPC1100 series has 16,000 or so register addresses for each GPIO port. The address serves as a bit mask for the port assignment. For eample, The adress range for PORT 1 is 0×5001 0000 to 0×5001 3FFC. The port is 12 bits wide and the mask bits are bits 13 through 2 of the address. The hex number 0×3000 expands to the binary number 11 0000 0000 0000. As you can see only bits 12 and 13 are high. Those bits correspond to 11 and 12 of the port. So, no matter what I write to address 0×5001 3000, only pin 11 and pin 12 of the port are effected. I think that is an incredibly useful feature and I much prefer it to the set, invert, and clear triage of registers. The Texas instruments Cortex M3 series employs a similar addressing scheme but the ST M3 series does not.

Are ARM vendors going to steal all of Microchips business overnight? No, of course not. Currently, the LPC1100 series consists of one line of chips, offered in two packages, QFN32 and TGFP48. Obviously, that can’t compete with the huge range of micros offered by 8-bit vendors. Nor can ARM compete with the huge amount of support already available from 8-bit vendors for typical 8-bit applications. For example, if I need the lowest cost method of implementing embedded Ethernet, I will still be headed to Microchip. However, for those situations where NXPs limited range of Cortex M0 micros happens to fit the needs of your application, they make a very convincing argument.